Electro-optic modulator

ABSTRACT

An electro-optic device includes a semiconducting layer in which is formed a waveguide, a modulator formed across the waveguide comprising a p-doped region to one side and an n-doped region to the other side of the waveguide, wherein at least one of the doped regions extends from the base of a recess formed in the semiconducting layer. In this way, the doped regions can extend further into the semiconducting layer and further hinder escape of charge carriers without the need to increase the diffusion distance of the dopant and incur an additional thermal burden on the device. In an SOI device, the doped region can extend to the insulating layer. Ideally, both the p and n-doped regions extend from the base of a recess, but this may be unnecessary in some designs. Insulating layers can be used to ensure that dopant extends from the base of the recess only, giving a more clearly defined doped region. The (or each) recess can have non-vertical sides, such as are formed by v-groove etches, A combination of a vertical sidewall at the base of the recess and a non-vertical sidewall at the opening could be used.

RELATED APPLICATIONS

This application is a 35 U.S.C. 371 national stage filing ofInternational Application No. PCT/GB02/00773, filed 22 Feb. 2002, whichclaims priority to Great Britain Patent Application No. 0104384.3 filedon 22 Feb. 2001; Great Britain Patent Application No. 0106092.0 filed on13 Mar. 2001; Great Britain Patent Application No. 0106338.7 filed on 14Mar. 2001; Great Britain Patent Application No. 0107613.2 filed on 27Mar. 2001; and Great Britain Patent Application No. 0123245.3 filed on27 Sep. 2001, all in Great Britain. The contents of the aforementionedapplications are hereby incorporated by reference.

TECHNICAL FIELD

The present invention relates to an electro-optic modulator.

BACKGROUND OF THE INVENTION

Electro-optic modulators influence an optical mode and are understood towork by affecting the complex refractive index of a semiconductorwaveguide and thereby affecting the transmission of light propagatingtherein. In such a device, a p-i-n diode normally is formed across thewaveguide and injects charge carriers into the region in which the modeis propagating. The presence of significant numbers of charge carriersaffects the local refractive index and thus the speed of lighttransmission. This effect can be used in switches, interferometers etc.

In SOI (Silicon On Insulator) optical devices the mode propagates in asilicon layer over an insulating layer supported on a substrate. Theinsulating layer can then act as a confinement layer for the chargecarriers in the vertical direction. However, it has been found thatsignificant numbers of charge carriers still escape laterally, and thisadversely affects both the performance of the device and itsreproducibility.

SUMMARY OF INVENTION

The present invention therefore provides, in its first aspect, anelectro-optic device including a semiconductor layer in which is formeda waveguide, a modulator formed across the waveguide comprising a dopedregion on either side, a lower confinement structure for charge carriersbeneath the waveguide, lateral confinement structures for chargecarriers on either side of the waveguide which extend to the lowerconfinement structure, at least one of the lateral confinementstructures being the doped region to that side of the waveguide, thedoped region extending to the lower confinement structure.

Preferably the semiconducting layer comprises silicon, more preferablycrystalline silicon. The lower confinement structure preferablycomprises an electrically insulating layer. The lower confinementstructure for charge carriers may also comprise an optical confinementstructure. It is preferred that the semiconducting layer is formed on aninsulating layer supported on a substrate, e.g. an SOI device. In thiscase, the insulating layer can provide the lower confinement structure.

It is naturally preferred that both lateral confinement structures areprovided by respective p and n-doped regions either side of thewaveguide. However, there may at times be no need or no motivation to doso on one particular side, for example if there are adjacent structureswhich themselves may provide electrical confinement.

The lateral confinement structures and/or the doped regions (where thetwo are distinct) can extend from the base of a recess in thesemiconducting layer to the insulating layer; preferably they extendfrom the base only of such a recess.

The waveguide is normally covered by an insulating layer to ensure adistinct refractive index step, confining the optical mode, and toreduce unwanted electrical effects. This insulating layer can extend toand down at least one side of the recess, which if put in place prior todoping will ensure that dopant extends from the base of the recess only,giving a more clearly defined doped region.

The (or each) recess can have non-vertical sides, such as are formed byv-groove etches, which method of manufacture has the advantage thatmetal contacts leading to the doped regions will be less prone tofailure due to thinning at the edge of the recess. A combination of avertical sidewall at the base of the recess and a non-vertical sidewallat the opening could be used.

In a standard lateral p-i-n diode structure, the doped region to oneside is p-type and the doped region to the other side of the waveguideis n-type. Other diode geometries exist, however, and other electricalstructures such as transistors can be provided.

Confining structures are used in the present invention to inhibit theescape of charge carriers from the region of interest. Physicalstructures such as deep trenches, insulating layers and the like willprovide confinement. In addition, we have found that a doped regionprovides confinement. It is thought that opposite charges are confinedby a recombination process and like charges are confined by theconcentration gradient established by the dopant.

In its second aspect, the present invention provides an electro-opticdevice including a semiconducting layer in which is formed a waveguide,a modulator formed across the waveguide comprising a doped region oneither side, wherein at least one of the doped regions extends from thebase only of a recess formed in the semiconducting layer.

In this way, the doped regions can extend further into thesemiconducting layer and further hinder escape of charge carrierslaterally within the semiconductor layer. This is however achievedwithout the need to increase the diffusion distance of the dopant, whichwould incur an additional thermal burden on the device. Further,limitation of the dopant area to the base of the recess reduces thelateral spread of dopant and keeps the volume used for transmission ofthe optical mode clear of dopant, which if present is apt to causelosses and inefficiency.

As before, an insulating layer, e.g. an oxide layer, can be provided onside walls of the device to inhibit diffusion of dopant therethrough.Alternatively, or in addition, the dopant can be implanted in thesemiconducting layer.

The waveguide is preferably a rib waveguide, although other designs ofwaveguide are known and can be used.

A plurality of such lateral modulators can be formed along the length ofthe waveguide, each being a p-i-n modulator, adjacent modulators beingmutually reversed in orientation. This gives a particularly efficientform of modulation. Ideally there will be an even number of modulators,e.g. two, four, six or eight.

Embodiments of the present invention will now be described by way ofexample, with reference to the accompanying figures, in which;

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a vertical section through a known lateral p-i-n diodemodulator;

FIG. 2 a is a model of the carrier density of the modulator of FIG. 1;

FIG. 2 b is a plot of the carrier concentration along line A-A of FIG. 2a;

FIGS. 3 and 4 are vertical sections through p-i-n diode modulators beingfirst and second embodiments of the present invention;

FIG. 5 a is a model of the carrier density of the modulator of FIG. 4;

FIG. 5 b is a plot of the carrier concentration along line B-B of FIG. 5a;

FIG. 5 c is a model of the carrier density of the modulator of FIG. 3;

FIG. 6 is a vertical section through a p-i-n diode modulator accordingto a third embodiment of the present invention; and

FIG. 7 compares the attenuation of the modulator of FIG. 1 with themodulator of FIG. 6.

DETAILED DESCRIPTION

FIG. 1 shows a standard SOI (silicon-on-insulator) rib waveguide with alateral injection p-i-n diode made by diffusion into a semiconductingslab. In this arrangement, the waveguide 10 is in the form of a rib onthe surface of the silicon epi layer 12. The epi layer 12 is formed onan insulating oxide layer 14 which is itself supported on a substrate16. On either side of the rib waveguide 10 are a pair of doped regions.To one side there is an n⁺ doped area 18, and to the other there is a p⁺doped area 20. Metal contacts, 22, 24 lead to the doped regions 18, 20and a p-i-n diode is thus formed. An insulating layer 26, eg of silicondioxide, is formed over the rib waveguide 10 to provide a more distinctrefractive index step and thereby assist in optical confinement, andalso beneath the metal contacts 22, 24 away from the doped regions 18,20 to provide electrical insulation.

FIG. 2 shows a model of the carrier distribution for this device. In theupper region of the graph, the physical structure of the device can beseen in terms of the rib 10, the insulating layer 26 and the metalcontacts 22, 24. Within the semi-conducting area, the concentration ofholes is shown by way of contour lines; the peak hole concentration is10²⁰ at point 30 and the minimum is 10¹⁴ at 32. Contours in theintermediate regions are on a logarithmic scale. Details of the electronconcentration are not shown as the device is symmetrical and thereforethe hole and electron concentrations will be complementary.

It can be seen that in the doped regions 30, 32 there is a significantworking concentration of charge carriers. However, there is a distinctgap 34 beneath the doped regions but above the insulating layer 14 wherethe charge carrier concentration is at a high level, and almost equal tothe carrier concentration in the core of the waveguide. This modulationstructure is therefore inefficient due to the lack of carrierconfinement and poor overlap between the generated high carrierconcentration and the optical mode.

FIG. 2 b shows the charge concentration in the area of the optical mode,and on the logarithmic scale it can be seen that the general chargecarrier concentration is at approximately 5-6×10¹⁷ cm⁻³.

FIG. 3 shows the first embodiment of the invention. The rib waveguide 10is again formed on the silicon epi layer 12 of the SOI structure.However, a pair of trenches 36, 38 are formed either side of the ribwaveguide 10 and doping is carried out into these trenches to form an n⁺doped area 18 and a p⁺ doped area 20. Metal contacts 22, 24 are againprovided, as is a protective and insulating oxide layer 26.

The increased depth from which the doping is carried out, due to thetrenches 36, 38, means that the n⁺ and p⁺ doped areas 18, 20 reach theinsulating layer 14 beneath the silicon epi layer 12.

FIG. 4 shows a similar structure according to a second embodiment of theinvention. In the first embodiment of FIG. 3, doping is carried out soas to extend from the base of the recesses 36, 38 only. In FIG. 4, thislimitation of the extent of doping is not present. These examples couldbe achieved (for example) by diffusion processes or by ion implantation.In FIG. 3, the protective oxide layer 26 a is extended to the sides ofthe recesses 36, 38 in order to assist in limiting the doped area to thebase of the trench.

The dopant profile of FIG. 3 is very advantageous. As the dopant extendsonly from the base of the trench and not from the sides, the lateralspread of the dopant during drive-in is significantly limited. Inaddition, the use of the recess from which the dopant extends reducesthe amount of drive-in needed, and thus further reduces the lateralspread. Thus, the lateral dimension is more reproducible and moreaccurately ascertainable. Dopant concentrations in the vicinity of theoptical mode can be avoided, reducing losses and inefficiency. The dopedregions can be safely moved closer to the optical mode, thereby reducingthe dimensions of the device with the attendant advantages thereof.

FIG. 5 a shows a model of the structure of FIG. 4, displayed on the samebasis as FIG. 2 a. It can be seen that the areas 30 a, 32 a of greatestcarrier concentration are confined in the structure in that they extendto the underlying insulator layer 14. Thus, carrier escape is preventedin this arrangement and carrier loss must therefore be by recombination.FIG. 5 b shows carrier concentration in the area of the optical mode,and it can be seen that on the logarithmic scale this varies between 7and 8×10¹⁸ cm⁻³, a detectably higher level than that of FIG. 2 bindicating the carriers are not escaping to the same extent.

FIG. 5 c shows a similar model for the structure of FIG. 3. It can beseen that there is little lateral escape of charge carriers, and littlespread of dopant into the optical mode region.

FIG. 6 shows a third embodiment of the present invention. Thiscorresponds generally to that of FIG. 4 but the trench recesses 36 a, 38a are formed with angled edges such as that at 40. This can be achievedvia a v-groove etch, for example. This eases the deposition of the metalcontacts (not shown in FIG. 6) as they do not need to traverse a sharpcorner and are therefore less prone to thinning. Dopant can be confinedto the base of the trench if desired.

In order to compare the performance advantage by employing the presentinvention, a device was fabricated according to FIG. 6 with a 1.8 micronetch on a 2.6 micron slab. A second device was fabricated identicallyexcept that the diodes were placed on the surface of the slab region asper FIG. 1. Doping was introduced into both devices using a diffusionprocess, thus creating two structures which are identical except thatthe vertical depth of the doping is greater in the novel device.

The attenuation of light passing through the waveguide due to carrierinjection was measured in a 2 mm long diode structure. Attenuation isdirectly proportional to the carrier concentration injected into thewaveguide region by the forward biased diode. The results of thismeasurement are shown in FIG. 7. Line 42 is for the novel structurewhereas line 44 is for the comparative structure without recesses. Itcan be seen that for any given current, the attenuation achieved for thenovel diode 42 is approximately 40% greater than for the standardstructure of FIG. 1. Therefore, it can be inferred that the carrierconcentration in the waveguide must also be greater in the novel diodestructure as generally predicated by the modeling shown in FIGS. 2-5.Alternatively, to achieve the same level of attenuation a lowerinjection current is required thereby giving a lower power drain andless local heating. In a further alternative the same attenuation can beachieved for the same current using a physically smaller modulatorstructure.

The above-described embodiments have all been SOI structures. It is tobe expected that application of the invention to non-SOI devices willstill give enhanced results although an alternative lower confinementstructure will need to be provided.

Further, the above embodiments concentrate on single p and single njunction devices, whereas other diode geometries and other electricalstructures such as transistors could also be considered.

It will be appreciated that many variations can be made to theabove-described embodiments, without departing from the scope of thepresent invention.

1. An electro-optic device, comprising: a semiconductor layer having aridge extending upwards from slab regions positioned on opposing sidesof the ridge, the semiconductor region having a lower ridge regionpositioned under the ridge and between the slab regions, the ridgedefining a portion of a waveguide configured to guide light though thesemiconductor layer; a modulator across the waveguide, the modulatorincluding doped regions of the semiconductor layer, the doped regionsbeing on opposing sides of the ridge; a lower confinement structure forcharge carriers, the lower confinement structure being beneath thewaveguide; lateral confinement structures for charge carriers, thelateral confinement structures being on opposing sides of the ridge, atleast one of the doped regions serving as one of the lateral confinementstructures; and recesses that each extends into an upper surface of oneof the slab regions such that each recess is positioned between thelower ridge region and a portion of the slab region into which therecess extends, each recess extending only part way into thesemiconductor layer, the recesses being on opposing sides of the ridge,each of the doped region extending from a bottom of one of the recessesdown to the lower confinement structure.
 2. The device of claim 1,wherein each of the doped regions serves as one of the lateralconfinement regions.
 3. The device of claim 1, wherein thesemiconducting layer is on an insulating layer supported on a substrate.4. The device of claim 3, wherein the insulating layer is the lowerconfinement structure.
 5. The device of claim 4, wherein each of thelateral confinement structures extends from the bottom of one of therecesses down to the insulating layer.
 6. The device of claim 5, whereineach recess is defined by a bottom side and lateral sides and eachlateral confinement structure extends from the bottom side of one of therecesses without extending from any of the lateral sides of one of therecesses.
 7. The device of claim 1, wherein the ridge is covered by aninsulating layer.
 8. The device of claim 7, wherein the insulating layerextends from the ridge into one of the recesses.
 9. The device of claim1, wherein one of the doped regions is a p-type doped region and anotherone of the doped regions is an n-type doped region and the n-type dopedregion and the p-type doped region are positioned on opposing sides ofthe ridge.
 10. The device of claim 1, wherein the waveguide is a ribwaveguide.
 11. The device of claim 10, wherein the modulator is one offour modulators on the device.
 12. The device of claim 1, wherein thesemiconducting layer comprises silicon, preferably crystalline silicon.13. The device of claim 1, wherein each of the recesses is spaced apartfrom the ridge such that a side of the ridge does not extend into therecess.
 14. The device of claim 1, wherein each doped region extendsfrom the bottom of one of the recesses down to the lower confinementstructure such that the each doped region spans a distance between thebottom of one of the recesses and the lower confinement structure. 15.The device of claim 1, wherein the recesses are each defined by a bottomside and by lateral sides.
 16. The device of claim 1, wherein the bottomside of each is recess is parallel to a top side of the slab region. 17.The device of claim 1, wherein the slab regions and the ridge areincluded in a single and continuous piece of material.
 18. The device ofclaim 1, wherein each recess is configured such that the upper surfaceof the slab region into which the recess extends is positioned onopposing sides of an opening to the recess.